Syntiant Corp. is looking for a Senior Staff ASIC Design Engineer to play a leading role in enhancing the Hardware Engineering in a growing organization. The successful candidate will be responsible for architecting and implementing Syntiant's next-generation Neural Digital Processor (NDP) for low-power edge AI applications.
Requirements
- Minimum Masters degree in electrical engineering, PhD preferred
- A proven track record of 5+ years in developing low-power signal processing IPs from architecture to implementation
- Hands-on experience developing IPs using SystemC HLS (High-Level Synthesis)
- Good knowledge and experience in architecture/design of NPUs
- Good knowledge in ML network architecture (Dense, CNN, RNN, Transformer, etc)
- RTL implementation of Digital Signal Processing algorithms, using Verilog or System Verilog
- Implementation of test benches and digital verification methods
- Experience in PPA (Power/Performance/Area) optimizations
- Programming/scripting languages (e.g., Python, C/C++, or Perl)
- Task centered, self-driven, persistent, and team oriented
- Experience with ML frameworks (Tensorflow, PyTorch, etc.) is a plus
Benefits
- Medical
- Dental
- Vision
- Life Insurance / AD&D
- Disability Coverage
- Spending and Savings Accounts
- 401K Retirement Plan
- Other Benefits