Staff ASIC Engineer – DFT

We are seeking a passionate and detail-oriented ASIC Digital Design professional to lead and execute scan insertion and ATPG flows for complex ASIC designs, working closely with RTL and Verification teams to ensure DFT requirements are integrated early in the design cycle.

Requirements

• Extensive hands-on experience with DFT methodologies, including scan insertion and ATPG for complex ASIC designs
• Proficiency with industry-standard EDA tools such as Spyglass DFT and scan STA analysis suites
• Strong understanding of digital logic design, RTL coding, and verification principles
• Demonstrated ability to debug and resolve DFT-related issues across multiple project phases
• Solid scripting skills (e.g., TCL, Perl, Python) to automate design and test flows

Benefits

• Comprehensive range of health, wellness, and financial benefits
• Monetary and non-monetary offerings
• Flexible benefits package