Senior Principal Analog Power Management Integrated Circuit (PMIC) Design Engineer (Technical Lead)

Red Cell Partners is seeking a Senior Principal Analog Power Management Integrated Circuit (PMIC) Design Engineer (Technical Lead) to join Claros Inc. in Torrance, CA. The role involves designing and developing high-performance analog circuits for PMICs, collaborating with other engineers, and leading a team of designers.

Requirements

• Bachelor's degree in electrical engineering
• 8+ years of experience in analog/mixed signal IC Design
• Knowledge of semiconductor manufacturing processes
• Experience designing circuits in High voltage (BCD) technology processes and FinFET technology
• Strong background in Power Management devices and circuit design principles
• Proficiency in using Cadence IC Design Tools
• Familiarity with industry standard interface protocols such as SPI, I2C, PMBus/SMBus
• Ability to document design techniques, test and verification methodology
• Conduct design reviews, analyze and debug circuits, and perform system-level testing
• Full chip integration and Top-Level Simulations
• Strong analytical and problem-solving skills
• Excellent communication and collaboration skills

Benefits

• 100% employer paid, comprehensive health care
• Paid maternity and paternity for 14 weeks at employees' normal pay
• Unlimited PTO, with management approval
• Optional 401K, FSA, and equity incentives available