As a Physical Design Manager Engineer, you will serve as the technical reference point for the most complex digital blocks and ensure that the functional design intent is preserved and optimized during physical implementation. You will drive the entire implementation flow and manage complex timing closures.
Requirements
- 10+ years of experience in the semiconductor industry with a focus on Physical Design and Digital Implementation
- Expert knowledge of the SDC format and ability to write and debug complex constraints for multi-mode/multi-corner (MMMC) designs
- Solid experience in STA (PrimeTime/Tempus), CDC (Clock Domain Crossing) analysis, and managing hold/setup violations in advanced technology nodes or critical automotive contexts
- Excellent automation skills (Tcl, Python, Perl) for report analysis and massive data flow management
Benefits
- Flexible working conditions
- Hybrid work environment
- Competitive remuneration
- Position based in Rome