Senior DFT Engineer
NXP SemiconductorsBengaluru, Karnataka, India
Posted April 12, 2025
Full Time
About the Company
We anticipate tomorrow’s needs—navigating a changing world by bringing together technology's brightest minds to build game-changing solutions that propel us forward. NXP Semiconductors N.V. (NASDAQ: NXPI) is the trusted partner for innovative solutions in the automotive, industrial & IoT, mobile, and communications infrastructure markets. NXP's "Brighter Together" approach combines leading-edge technology with pioneering people to develop system solutions that make the connected world better, safer, and more secure. The company has operations in more than 30 countries and posted revenue of $12.61 billion in 2024. Find out more at www.nxp.com. Career Development Opportunities : Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills. Commitment At NXP. We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality. Privacy Policy: https://www.nxp.com/company/about-nxp/privacy-policy-for-social-media-pages:PRIVACY-POLICY-SOCIAL-MEDIA
Job Description
Job responsibilities: Implement scan insertion, ATPG pattern generation, Memory and logic bist implementation. Perform DFT simulations and analyze results to ensure test coverage and quality. Debug and resolve DFT-related issues throughout the design process.
Requirements
- Senior DFT engineer with 4+ years of experience in SoC DfT implementation and verification of scan architectures, JTAG, memory BIST, ATPG, LBIST.
- Verilog/VHDL RTL coding experience
- Experience in using Mentor DfT tools and Cadence tools
- Scan insertion, JTAG, LBIST, ATPG DRC and coverage analysis experience
- Simulation debug with timing/SDF experience
- Post Silicon Readiness (Pattern Generation) and Silicon Debug expertise
- Ability to debug and root cause simulation failures
- BE/ME/B.Tech/M.Tech degree from reputed institutes
- Self-motivation, flexibility, with strong interpersonal skills
- Effective communication skills, oral and written skills
- Engaged curiosity, willingness to learn and improve