Senior FPGA Design Engineer

We are developing cutting-edge 5G wireless systems solving rural and urban high bandwidth networking requirements. We seek strongly motivated candidates with experience in System Verilog programming for wireless baseband design. The role involves architecture definition, implementation, testing, and resolution of system issues.

Requirements

• 5+ years of work experience and 2+ years of experience in handling team.
• Strong base in digital design, RTL & FPGA development flows.
• Proficiency in HDLs like SystemVerilog/Verilog for RTL Design.
• Knowledge & experience of building IPs using AXI4, AXI4 Lite and AXI4 Stream Protocol.
• Basic understanding in Xilinx FPGA Architecture and tools like Vivado.
• Good understanding in digital signal processing techniques such as Fast Fourier Transform, and good handle on linear algebra and complex algebra is a plus.
• Good understanding in realization of baseband for wireless systems such as OFDM is a plus.
• Ability to research unfamiliar technologies and methods for application in our product development and support.
• Ability to understand and follow engineering processes such as JIRA and version control (Git).

Benefits

• Great career growth
• ESOPs
• Gratuity
• PF and Health Insurance