Design Verification Engineer

As a Design Verification Engineer, you'll be a vital part of the chip design team, ensuring the quality of SOCs, IPs, or subsystems. This involves reviewing specifications, collaborating with design teams, understanding functional goals, developing test plans, and defining verification methodologies. You'll also run regressions, triage bugs, and analyze coverage to achieve excellent results.

Requirements

• Minimum of BS + 0 years relevant industry experience.
• Knowledge of computer architecture and digital design fundamentals
• Knowledge of Verilog or SystemVerilog, digital simulation and debug
• Experience with Python, Perl, or similar scripting language
• Ability to work independently to deliver the project goals
• Experience with C/C++, assembly is a plus
• Excellent interpersonal skills

Benefits

• Apple is an equal opportunity employer that is committed to inclusion and diversity.