At Western Digital, our vision is to power global innovation and push the boundaries of technology to make what you thought was once impossible, possible. We are seeking an Expert-level Hardware Engineer who is equally strong in board-level hardware design and ASIC interface / integration (I/O, package, power integrity, DFT/test, analog, and signal integrity).
Requirements
- Professional hardware engineering experience.
- Proven ownership of multiple complex programs through the full lifecycle: architecture → design → build → bring-up → debug → qualification → production ramp → sustaining.
- Demonstrated, hands-on experience spanning both: Board/system hardware design (schematic ownership, layout partnership, bring-up, debug, standards compliance, manufacturing support) and ASIC I/O and integration (I/O architecture decisions, package/substrate considerations, PI/SI co-design, tape-out support, DFT/test hooks).
- Cutting-Edge High-Speed Interfaces.
- Hands-on experience integrating and debugging leading-edge Ethernet and PCIe interfaces, including: 100G/200G Ethernet PAM4 transceivers (system/channel design, equalization concepts, BER/PRBS testing, standards compliance planning and test) and PCIe Gen 6 (system/channel design, equalization concepts, BER/PRBS testing, standards compliance planning and test).
- Demonstrated ability to design and simulate high-speed links across die/ASIC package/PCB/connectors/cabling, balancing SI/PI/EMI and manufacturing constraints.
- FPGA Board Design.
- Proven experience designing complex boards using cutting-edge FPGAs (e.g., high-end families with high-speed transceivers), including: Power architecture and sequencing for FPGA multi-rail systems and High-speed transceiver channel design, with associated reference clock design, reset/boot/strap.
- Board-Level Design.
- Expert schematic design and review for high-complexity boards (compute/networking/accelerator-class or equivalent).
- Signal Integrity (SI) & Power Integrity (PI) Across Die / Package / Board.
- SI design experience: Insertion loss, return loss, eye/jitter concepts, electrical noise abatement, termination, discontinuities, correlation of models to measurements.
- Deep PI/PDN experience: target impedance approach, decap strategy, anti-resonance mitigation, transient response, measurement and correlation.
- Practical EMI/EMC grounding/shielding/filtering understanding grounded in design and lab realities.
- ASIC I/O, Package, and Power Co-Design.
- Ability to own or co-own ASIC I/O choices: I/O standards, voltage domains, ESD strategy, drive/slew tuning, noise coupling/SSO considerations.
- Strong understanding of package/substrate impacts: Pinout/ballout tradeoffs, escape routing constraints, lane swapping realities and Package parasitics effects on SI/PI and timing margins.
- DFT / Test Strategy Bridging Silicon ↔ Board ↔ Manufacturing.
- Strong working knowledge of DFT concepts and productization: JTAG/boundary scan, scan/ATPG fundamentals, BIST/loopbacks/PRBS, on-chip monitors/telemetry.
- Experience defining debug and manufacturing test strategy: Test access, test point strategy, coverage vs SI impact, failure analysis workflows.
- Analog & Mixed-Signal Practical Depth.
- Practical capability to own/review analog subsystems relevant to high-performance designs: Clock generation/distribution and jitter sensitivity, Filtering/biasing, stability fundamentals, measurement integrity/noise coupling and Mixed-signal partitioning and grounding strategy.
- Tools & Workflow.
- Familiarity with mainstream schematic/layout environments (e.g., Cadence/Altium/Mentor-class tools) and constraint-driven design practices.
- Comfortable with SI/PI modeling workflows (IBIS/AMI, S-parameters, SPICE-level reasoning) and validation against lab data.
- Strong documentation, design review, ECO, and risk-management discipline
Benefits
- Paid vacation time
- Paid sick leave
- Medical/dental/vision insurance
- Life, accident and disability insurance
- Tax-advantaged flexible spending and health savings accounts
- Employee assistance program
- Other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity
- Tuition reimbursement
- Transit
- The Applause Program
- Employee stock purchase plan
- The WD Savings 401(k) Plan
